Memory Virtualization
Address spaces, the path from virtual to physical address, page tables, TLBs, swapping, and what a real production VM stack looks like.
Memory virtualization gives each process its own address space — code, heap, stack, mapped files — without knowing where any of it lives in DRAM. The hardware (MMU + TLB) translates virtual addresses to physical ones on every access; the OS sets up and maintains the translation structures and handles the misses.
This is the topic that splits OS knowledge into 'reads textbooks' versus 'understands the machine'. Get paging, TLBs, multi-level tables, and page replacement deep. Most performance-sensitive systems work touches one of those four.
Key concepts
- Translation is on every memory access — the TLB exists to make it cheap
- Page tables are sparse data structures (mostly empty) — multi-level walking is what makes them affordable
- OS deals with page faults; the MMU deals with translations and permission checks
- Replacement policy matters once memory is full — OPT is the upper bound; LRU and CLOCK approximate it
- Thrashing is what happens when working set > physical memory; no policy fixes it
Reference template
// Walking through a virtual address access
1. Virtual address lookup → TLB hit? (microseconds saved)
2. TLB miss → page table walk (multi-level)
3. Page in memory? → translation goes in TLB, access proceeds
4. Page not in memory → page fault → OS finds it (disk, zero, COW source)
5. Page table updated, retry → access succeedsAdapt to your problem; the structure is the load-bearing part.
Common pitfalls
- Forgetting that a TLB is per-CPU — context switches need invalidation (or ASIDs)
- Treating page tables as flat — they're sparse trees in every real system
- Confusing the working set with total allocation — RSS vs VSZ matters
- Assuming LRU is the answer — its true form is too expensive; CLOCK is what's actually shipped
Related topics
Items (11)
- Address Spaces
Code / heap / stack layout, why each process gets its own view, and the three goals (transparency, efficiency, protection).
Concept Foundational - Memory API — malloc, free, and friends
Heap allocation in user space, common errors (use-after-free, double-free, leaks), and how the allocator talks to the OS via brk / mmap.
Building Block Foundational - Address Translation — Base and Bounds
The simplest hardware mechanism for memory virtualization — relocation registers, bounds checks, OS responsibilities.
Building Block Intermediate - Segmentation
Generalised base/bounds per code/heap/stack segment, sharing across processes, fragmentation as the recurring cost.
Building Block Intermediate - Free Space Management
Allocator strategies — first-fit, best-fit, worst-fit, next-fit, segregated free lists, buddy, slab — and what fragmentation actually costs.
Building Block Intermediate - Paging Fundamentals
Fixed-size pages, page tables, valid / present / protection bits, and the cost paid on every memory access without a cache.
Building Block Intermediate - Translation Lookaside Buffers (TLBs)
The cache that makes paging fast. Miss handling (HW vs SW), context-switch invalidation, ASIDs, and a real TLB entry's bits.
Building Block Intermediate - Multi-Level Page Tables
Sparse address spaces, x86_64's 4-level walk, the time-space trade-off, inverted page tables, hashed alternatives.
Building Block Advanced - Swapping — Mechanisms
Swap space, the present bit, page fault control flow, copy-on-write, prefetching, and when replacements actually happen.
Building Block Intermediate - Page Replacement Policies — OPT, FIFO, LRU, CLOCK
The classic algorithms, why OPT is unachievable, how CLOCK approximates LRU cheaply, and the thrashing wall.
Building Block Intermediate - Linux Virtual Memory System
The Linux address space layout, four-level page tables, page cache, huge pages, KASLR — what a real production VM stack looks like.
System Advanced